Conductive Atomic Force Microscopy for Characterization of High-k Dielectrics

The thickness decrease of the SiO2 used as the gate oxide of MOS devices has become one of the main showstoppers of the microelectronic scaling down process, due to a dramatic increase of leakage currents and a decrease in lifetime[1]. The use of an alternative material with a higher dielectric constant (high-K) has been proposed to replace SiO2 as the gate dielectric, because High-K materials will allow to reach the required equivalent oxide thickness (EOT), but with a larger physical oxide thickness, which reduces the leakage current drastically. Most of the knowledge about the electrical behavior of high-k materials has been gained from measurements performed on macroscopic MOS capacitors or transistors[2,3,4] using standard electrical characterization methods at wafer level. This kind of tests, however, provides a spatially averaged information on the electrical properties of the material. On the contrary, Conductive Atomic Force Microscopy (CAFM), as demonstrated for SiO2[5], is able to characterize the gate dielectric at a nanometer scale.